Tensilica Instruction Extension refers to the proprietary language that is used to customize the Xtensa processor core architecture.
By using TIE, the user can customize the Xtensa architecture by adding custom instructions and register files, instantiating TIE Ports and Queues for multiprocessor communication, and adding pre-configured extensions (such as Tensilica's DSP). Software applications can greatly benefit from properly targeted user-defined instructions, while TIE ports and TIE queues facilitate multiprocessor communication by adding separate input and output interfaces to the processor core. Using the TIE language and Xtensa Xplorer toolkit, the generation and verification of the instructions used to extend the processor ISA are automated. Such automation helps to reduce the hardware verification time that typically consumes a large percentage of the project duration of a typical hardware developed for the same functionality.
Read more about Tensilica Instruction Extension: History, TIE Creation, Interface To C/C++, TIE Compilation, TIE Testing & Verification, See Also
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