Instruction Register

In computing, an instruction register (IR) is the part of a CPU's control unit that stores the instruction currently being executed or decoded. In simple processors each instruction to be executed is loaded into the instruction register which holds it while it is decoded, prepared and ultimately executed, which can take several steps.

Some of the complicated processors use a pipeline of instruction registers where each stage of the pipeline does part of the decoding, preparation or execution and then passes it to the next stage for its step. Modern processors can even do some of the steps out of order as decoding on several instructions is done in parallel.

Decoding the opcode in the instruction register includes determining the instruction, determining where its operands are in memory, retrieving the operands from memory, allocating processor resources to execute the command (in superscalar processors), etc.

The output of IR is available to control circuits which generate the timing signals that controls the various processing elements involved in executing the instruction.

Other articles related to "registers, instruction, register, instruction register":

Atari Jaguar II - Internal Blocks - Details Relative To Jaguar
... A subset of the blitter registers are double-buffered, so that a polygon drawing engine can program the parameters for a polygon blit while the previous blit is still under way ... The NOP instruction has been extended, so that if its operands are not zero then it becomes an unconditional jump relative with a ten bit signed jump offset, giving ... The PACK and UNPACK instruction can now operate on RGB16 pixels as well as CRY ...
Instruction Cycle - Circuits Used
... counter that keeps track of the memory address of the instruction that is to be executed next Memory address register (MAR) - holds the address of a memory ... There are typically four stages of an instruction cycle that the CPU carries out 1) Fetch the instruction from memory. 2) "Decode" the instruction ...
Serial Vector Format - SVF Commands
... HDR (Header Data Register) Specifies a header pattern that is prepended to the beginning of subsequent DR scan operations ... HIR (Header Instruction Register) Specifies a header pattern that is prepended to the beginning of subsequent IR scan operations ... SDR (Scan Data Register) Performs an IEEE 1149.1 Data Register scan ...

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