Observability
Simulation-based design environments enjoy the tremendous advantage of nearly perfect observability, meaning the designer can see any signal at nearly any time. They suffer, however, from the restricted amount of data they can generate during post-silicon system validation. Many complicated devices indicate their problems only after days or weeks of testing, and they produce a volume of data that would take centuries to reproduce on a simulator. FPGA-based emulators, a well-established part of most implementation techniques, are faster than software simulators but will not deliver the comprehensive at-system-speed tests needed for device reliability.
Moreover, the problem of post-silicon validation is getting worse, as design complexity increases because of the terrific advances in semiconductor materials processing. The duration from prototype silicon — so-called "first silicon" — to volume production is increasing, and bugs do escape to the customers. The expense associated with IP-hardening is increasing. The industry today is focused on techniques that allow designers to better amortize their investment in pre-silicon verification to post-silicon validation. The best of these solutions enable affordable, scalable, automated, on-chip wire-scale visibility.
Read more about this topic: Post-silicon Validation