Tandem Computers - History - TNS/R NonStop Migration To MIPS

TNS/R NonStop Migration To MIPS

When Tandem was formed in 1974, every computer company had to design and build its CPUs from basic circuits, using its own proprietary instruction set and own compilers etc. With each year of semiconductor progress with Moore's Law, more of a CPU's core circuits could fit into single chips, and run faster and much cheaper as a result. But it became increasingly expensive for a computer company to design those advanced custom chips, or build the plants to fabricate the chips. By 1991, only the very biggest companies could continue to design and build their own competitive CPUs. Tandem was not big enough for that, so it needed to move its NonStop product line and customer base onto some advanced microprocessor chip set designed and built by others.

HP's HP 3000 MPE division had similar roadmap problems but found a clever way forward in 1986. HP Labs designed a RISC computer core which was stripped of all non-essentials so it could soon fit into one chip. And it was efficiently pipelined and ran even faster than the ECL mainframes of that time. It was many times faster than the microprogrammed CMOS stack machines that the rest of HP was then designing.

But how to migrate all the vendor, customer, and third-party software for those existing product lines? Some software was portable and could be directly recompiled for the new instruction set. Other software was not easily recompiled as is. HP Labs invented efficient ways to run the old binaries of that software on the new machine, by emulation and by automatic translation of binary object code. And they told everyone how they did it. Similar object code translation techniques were subsequently used by Apple Computers, to move Macintosh software from M68000 machines to PowerPC machines, and by Digital Equipment Corporation, to move VMS users from VAXs to Alpha machines.

One flaw in the HP 3000 migration plan, is that HP also ambitiously tried to rewrite the entire MPE operating system in a new language at that same time. They didn't plan to use the same emulation techniques on their own primary code. But their rewrite to native mode took years longer to complete than expected. HP's first generation RISC hardware was already obsolete before its MPE software was ready to release. Tandem learned from this mistake.

Tandem could not use HP's PA-RISC or Sun's SPARC CPUs, for business reasons. Instead, Tandem partnered with MIPS and adopted its R3000 and successor chipsets and their advanced optimizing compiler. Subsequent NonStop Guardian machines using the MIPS instruction set were known to programmers as TNS/R machines, but had a variety of marketing names.

In 1991, Tandem released the Cyclone/R, also known as CLX/R. This was a low cost mid-range system based on CLX components, but used R3000 microprocessors instead of the much slower CLX stack machine board. To minimize time to market, this machine was initially shipped without any MIPS native-mode software. Everything, including its NSK operating system and SQL database, was compiled to TNS stack machine code. That object code was then translated to equivalent partially optimized MIPS instruction sequences at kernel install time by a tool called the Accelerator. Less-important programs could also be executed directly without pre-translation, via a TNS code interpreter. These migration techniques were very successful and are still in use today. Everyone's software was brought over without extra work, and the performance was good enough for mid-range machines, and programmers could ignore the instruction differences, even when debugging at machine code level. These Cyclone/R machines were updated with a faster native-mode NSK in a follow-up release.

The R3000 and later microprocessors had only a typical amount of internal error checking, insufficient for Tandem's needs. So the Cyclone/R ran pairs of R3000 processors in lock step, running the same data thread. It used a curious variation of lock stepping. The checker processor ran 1 cycle behind the primary processor. This allowed them to share a single copy of external code and data caches without putting excessive pinout load on the sysbus and lowering the system clock rate. To successfully run microprocessors in lock step, the chips must be designed to be fully deterministic. Any hidden internal state must be cleared by the chip's reset mechanism. Otherwise, the matched chips will sometimes get out of sync for no visible reason and without any faults, long after the chips are restarted. All chip designers agree that these are good principles because it helps them test chips at manufacturing time. But all new microprocessor chips seemed to have bugs in this area, and required months of shared work between MIPS and Tandem to eliminate or work around the final subtle bugs. )

In 1993, Tandem released the NonStop Himalaya K-series with the faster MIPS R4400, a native mode NSK, and fully expandable Cyclone system components. These were still connected by Dynabus, Dynabus+, and the original I/O bus, which by now were all running out of performance headroom.

In 1994, the NonStop Kernel was extended with a Unix-like POSIX environment called Open System Services. The original Guardian shell and ABI remained available.

In 1997 Tandem introduced the NonStop Himalaya S-Series with a new top-level system architecture based on ServerNet connections. ServerNet replaced the obsolete Dynabus, FOX, and I/O buses. It was much faster, more general, and could be extended to more than just two-way redundancy via an arbitrary fabric of point-to-point connections. Tandem designed ServerNet for its own needs but then promoted its use by others; it evolved into the InfiniBand industry standard.

All S-Series machines used MIPS processors, including the R4400, R10000, R12000, and R14000.

The design of the later, faster MIPS cores was primarily funded by Silicon Graphics Inc. But Intel's Pentium Pro overtook the performance of RISC designs and also SGI's graphics business shrunk. After the R10000, there was no investment in significant new MIPS core designs for high-end servers. So Tandem needed to eventually move its NonStop product line yet again onto some other microprocessor architecture with competitive fast chips.

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