Here is an intriguing idea. Instead of adding more and more cache memory near a microprocessor -- the approach traditionally used by the chipmakers like Intel or AMD -- some researchers in California want to put a processor on a DRAM chip.
This would -- theoretically -- reduce the gap between CPU and memory speeds. Let's look at some details.
The memory, called Data IntensiVe Architecture (DIVA), is a Processor in Memory (PIM) chip that contains four processors per memory chip, each capable of performing an 8-bit, 16-bit or 32-bit mathematical process.
In contrast to standard memory chips that can process 32 bits of information, each PIM chip can process up to 256 bits. With the four reduced instruction-set computing (RISC) processors per chip, the memory has the ability to perform four operations simultaneously, instead of one at a time like traditional memory.
Mercury Research principal analyst Dean McCarron said the approach is intriguing, but not likely to be used in a traditional PC environment. "This is good for environments where you are performing a lot of repetitive processing, where you do the exact same operation over the same sets of words in (a) very repetitive manner," McCarron said. Such environments would include graphics rendering farms used by Hollywood or a broadcast network backbone, where there's a lot of content encoding taking place.
I'm not sure if this approach will provide viable products. It seems that Hewlett-Packard expressed some interest, "although at this point it's purely in the evaluation stages, and no deal is in the works."
And Dr. John Granacki, a computer scientist at the USC Information Sciences Institute, said he's not "sure what the price will be but estimates there will be around a 50 percent cost penalty over the same size standard memory."
It looks like no products will be available before 18 months. So let's wait until 2004 to see if DIVA will emerge as a viable solution.
Source: Andy Patrizio, Wired News, Aug. 5, 2002
5:39:59 PM
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